Computer graphics systems commonly are used for displaying graphical representations of objects on a two dimensional display screen. Current computer graphics systems can provide highly detailed representations and are used in a variety of applications.
In typical computer graphics systems, an object to be represented on the display screen is broken down into a plurality of graphics primitives. Primitives are basic components of a graphics picture and may include points, lines, vectors and polygons, such as triangles. Typically, a hardware/software scheme is implemented to render, or draw, on the two-dimensional display screen, the graphics primitives that represent the view of one or more objects being represented on the screen.
Typically, the primitives that define the three-dimensional object to be rendered are provided from a host computer, which defines each primitive in terms of primitive data. For example, when the primitive is a triangle, the host computer may define the primitive in terms of the x,y,z coordinates of its vertices, as well as the R,G,B color values of each vertex. Rasterizing hardware interpolates the primitive data to compute the display screen pixels that are turned on to represent each primitive, and the R,G,B values for each pixel.
FIG. 1 illustrates the components of typical rasterizing hardware. A frame buffer controller 1 includes an edge stepper 3, a span stepper 5, and a memory controller 7. The edge stepper 3 determines through interpolation from the primitive data the pixels along each edge of a primitive and the corresponding color values. The pixels determined by edge stepper 3 define points on the ends of lines of pixels in the primitive. A line of pixels is called a span. The span stepper 5 receives the pixel data from the edge stepper for each line of pixels and determines the color values for each pixel in the line of pixels. The pixel and color values are provided to the memory controller 7 which writes the information in a video-random access memory (VRAM) 9. A display controller (not shown) drives the display based upon the contents of the VRAM.
Since the calculation process in the edge stepper 3 and span stepper 5 is complicated, the process can be slow. Using more than one frame buffer controller in parallel can increase the processing speed. FIG. 2 illustrates two parallel frame buffer controllers 1, 2. Each frame buffer controller 1, 2 includes an edge stepper 3, 4, a span stepper 5, 6, and a memory controller 7, 8. The memory controllers 7, 8 are connected to separate VRAMs 9, 10. The display controller combines the pixels stored in both VRAMs 9, 10 to generate the final display. When operating in parallel, each frame buffer controller may determine the values for specified lines of the screen (spans of pixels). The edge stepper 3, 4 on each frame buffer controller 1, 2 skips the non-specified lines of pixels. Although FIG. 2 illustrates two frame buffer controllers, any number is possible. Although the use of multiple frame buffer controllers in parallel can increase processing speed, the assignment of span lines to each frame buffer controller can be inefficient. Depending upon the shape and orientation of a primitive, the processing time for the span lines in frame buffer controllers can vary widely. For example, for a short, wide triangle primitive, one frame buffer controller may have scan lines covering a larger portion of the primitive at the base, and another frame buffer controller may have scan lines covering only a small portion at the tip. Since the primitives are provided simultaneously to each frame buffer controller, the processing time for the whole system depends upon the longest processing time in any frame buffer controller.
Alternatively, frame buffer controllers may be assigned to process different primitives. However, since primitives may be processed in any order, large FIFO memories are needed to reorder the pixel data to the correct positions and adjust for overlapping primitives.